The present invention relates generally to a solid state imaging device or a solid state image pickup device, and more particularly to a solid state imaging device which uses so-called active pixels and in which an electrical signal after photoelectric conversion can be outputted almost without attenuation.
In an active pixel in which an electrical signal after photoelectric conversion is amplified by a transistor disposed in each of the pixels, MOSFET""s are generally used as the amplification means and switches. A plurality of pixels each composed of such an active pixel are disposed in a matrix, and a solid state imaging device is constituted thereof.
FIG. 8 is a circuit diagram showing a structure of a conventional solid state imaging device which comprises the above-mentioned active cells. In FIG. 8, an example of a circuit structure in which 2xc3x972 pixels are disposed in a matrix is shown for the sake of simplicity.
Each pixel which constitutes an active pixel comprises a photodiode 801, a reset FET 802, an FET for amplification or an amplification FET 803, a row selection FET 804. An output portion or node of the photodiode 801 is reset by the reset FET 802. Also, the output portion of the photodiode 801 is coupled to the gate of the FET for amplification 803. The source of the FET for amplification 803 is connected to each of column signal line 808 via the row selection FET 804, and the drain of the FET for amplification 803 is connected to a power supply line 807.
For each column, there are provided a current source FET 809, and a column selecting FET 812. Each of the column signal line 808 is coupled to the ground via the current source FET 809. A bias line 815 biases the gate voltage of the current source FET 809 to an appropriate value such that the current source FET 809 performs a constant current operation. Each of the column signal lines 808 is connected to a signal line 813 via a column selecting FET 812. The signal line 813 is coupled to an input of an output buffer 814 from which an output signal of the solid state imaging device is outputted. There is also provided a row scanning circuit 810 which accesses each row, by turning on and off the row selection FET 804, and by turning on and off the reset switches 802 every row. Also, a column scanning circuit 811 is provided which accesses each column, by sequentially turning on and off the column selecting FET""s 811.
In operation, the reset line 806 of a particular row is raised to a high potential level by the row scanning circuit 810. Thereby, the particular row is accessed, and the reset FET""s 802 of all pixels in that row are turned on. Therefore, electric charges are injected into an output portion or node of each of the photodiodes 801 from a power supply line 807, and the potential of the output portion of each of the photodiodes 801 as photoelectric conversion means becomes approximately equal to a power supply voltage. Subsequently, the reset FET""s 802 are turned off and an exposure time period begins to start. Thereafter, a current corresponding to an intensity of light irradiated onto each pixel flows through a photodiode 801 of a corresponding pixel, and electric charges existing at the output portion of each of the photodiodes 801 are gradually extracted to the ground.
After a predetermined time period has elapsed, a row selection line 805 is raised to a high potential level by the row scanning circuit 810, and the row selection FET""s 804 in respective pixels are turned on simultaneously. Thereby, output voltages of the photodiodes 801 appear at respective column signal lines 808. That is, in each of the pixels, the FET for amplification or the amplification FET 803 and the current source FET 809 constitute a source follower circuit, and therefore a voltage near a gate voltage of the FET for amplification 803, that is, the output voltage of the photodiode 801, appears at the column signal line 808. Here, the bias line 815 supplies a bias voltage of appropriate potential to the gate of each of the current source FET""s 809 such that the current source FET""s 809 perform constant current operation. In this way, signals of a particular row are outputted and, subsequently, the column selection FET""s 812 are sequentially turned on by the column scanning circuit 811, thereby the signals are readout via the signal line 813 and the output buffer 814.
The above-mentioned conventional active pixel type solid state imaging device has the following disadvantages. First, a gain of each source follower circuit becomes a value much lower than the ideal value of 100 percent, for example, a typical value of about 75 percent of the ideal value, due to the body effect or backgate effect. Thereby, a signal voltage at the output portion of each photodiode 801 and a signal voltage on the column signal line 808 are not equal to each other, and it is only possible to output an attenuated signal having a small amplitude. In other words, if the output signal of the photodiode ranges from 0 to 3 V, it is only possible to obtain a small signal typically ranging from 0 through 2.3 V on the column signal line 808. Therefore, the conventional solid state imaging device has a disadvantage that it is vulnerable to external noises.
Also, the conventional active pixel type solid state imaging device has a disadvantage that it is not suitable for use with a low power supply voltage. The reason for this is as follows. In general, a full-scale range of an output signal of a photodiode varies depending on a power supply voltage. That is, if the power supply voltage is high, the full-scale range becomes large, and if the power supply voltage is low, the full-scale range becomes small. This is because, the reset voltage of a photodiode is approximately equal to the power supply voltage, and an output voltage of the photodiode after exposure is equal to or smaller than the reset voltage. Therefore, in case of a conventional solid state imaging device having a source follower configuration, an amplitude of an output signal is small and the amplitude of the output signal becomes smaller as the power supply voltage becomes lower. Thus, usable voltage range of a power supply voltage in which the solid state imaging device is operable as a device is limited.
Further, in general, an AD converter is coupled to a rear stage of a solid state imaging device. However, since the amplitude of an output signal of a conventional solid state imaging device is small, the AD converter must have a high resolution, so that a high performance AD converter is required. Therefore, an overall cost of an imaging apparatus or system becomes disadvantageously high.
It is an object of the present invention to provide an active pixel type solid state imaging device in which a signal after photoelectric conversion can be outputted at approximately a unity gain and deterioration of an amplitude of the signal can be suppressed.
It is another object of the present invention to provide an active pixel type solid state imaging device which is robust against noises.
It is still another object of the present invention to provide an active pixel type solid state imaging device which is suitable for use with a low power supply voltage.
It is still another object of the present invention to provide an active pixel type solid state imaging device in which an increase in the total cost of an imaging system can be suppressed.
According to an aspect of the present invention, there is provided a solid state imaging device comprising: a plurality of active pixels each of which has at least a photodiode and a first amplification transistor for amplifying an output of said photodiode and which are disposed in a matrix having rows and columns; a plurality of row selecting lines disposed corresponding to rows of said plurality of active pixels respectively; a plurality pair of column signal lines disposed corresponding to columns of the plurality of active pixels respectively; and second amplification transistors which are disposed corresponding to the respective pairs of column signal lines and which amplify outputs of the active pixels delivered via the pairs of column signal lines; wherein, in response to a row selecting signal for selecting active pixels of one row, the first amplification transistors of the active pixels of the selected row and the second amplification transistors disposed in corresponding columns are coupled to form voltage followers, and output signals of the active pixels of the selected row are amplified by the voltage followers.
In this case, it is preferable that each of the voltage followers includes the first amplification transistor, the second amplification transistor, and a current mirror circuit comprising a pair of transistors constituting a reference side load and an output side load.
It is also preferable that the gate of the first amplification transistor is coupled to an output of the photodiode, the source of the first amplification transistor is coupled to the source of the second amplification transistor via one of the pair of column signal line, and the drain of the first amplification transistor is coupled to the reference side load of the current mirror circuit via the other of the pair of column signal line, and wherein the gate of the second amplification transistor is coupled to the drain thereof, and the drain of the second amplification transistor is coupled to the output side load of the current mirror circuit.
It is further preferable that the source of the first amplification transistor is coupled to one of the pair of column signal lines via a first switching transistor, and the gate of the first switching transistor is coupled to the row selecting line.
It is advantageous that the drain of the first amplification transistor is coupled to the other of the pair of column signal lines via a second switching transistor, and the gate of the second switching transistor is coupled to the row selecting line.
It is also advantageous that the source and the drain of the first amplification transistor are coupled to the pair of column signal lines via first and second switching transistors respectively, and the gates of the first and second switching transistors are coupled to the row selecting line.
It is further advantageous that the source of the second amplification transistor is coupled to the one of the pair of column signal lines via a third switching transistor.
It is preferable that the drain of the second amplification transistor is coupled to the output side load of the current mirror circuit via a fourth switching transistor.
It is also preferable that the source and the drain of the second amplification transistor are coupled to the one of the pair of column signal lines via a third switching transistor and to the output side load of the current mirror circuit via a fourth switching transistor.
It is further preferable that the solid state imaging further comprises column selecting transistors for selectively coupling an output signal of the active pixel of a selected column to an output signal line via the voltage follower.
It is advantageous that each of the active pixels further comprises a reset transistor for resetting an output voltage of the photodiode before an exposure period.
According to another aspect of the present invention, there is provided a solid state imaging device comprising: a plurality of active pixels each of which has at least a photodiode, a reset transistor for resetting an output voltage of the photodiode, and a first amplification transistor for amplifying an output of the photodiode and which are disposed in a matrix having rows and columns; a row scanning circuit for selecting a row of the active pixels disposed in a matrix; a column scanning circuit for selecting a column of the active pixels disposed in a matrix; a plurality of row selecting lines which are respectively disposed along the rows of the active pixels and which couple from the row scanning circuit to the active pixels of respective rows; a plurality pair of column signal lines which are respectively disposed along the columns of the active pixels; a plurality of reset lines which are respectively disposed along the rows of the active pixels and which couple from the row scanning circuit to the reset transistors in the active pixels of respective rows to provide the reset transistors with a reset signal to start an exposure period of the active pixels; second amplification transistors which are disposed corresponding to the respective pairs of column signal lines and which amplify outputs of the active pixels delivered via the pairs of column signal lines; wherein, in response to a row selecting signal for selecting active pixels of one row, the first amplification transistors of the active pixels of the selected row and the second amplification transistors disposed in corresponding columns are coupled to form voltage followers, and output signals of the active pixels of the selected row are amplified by the voltage followers.
In this case, it is preferable that each of the voltage followers includes the first amplification transistor, the second amplification transistor, and a current mirror circuit comprising a pair of transistors constituting a reference side load and an output side load.
It is also preferable that the gate of the first amplification transistor is coupled to an output of the photodiode, the source of the first amplification transistor is coupled to the source of the second amplification transistor via one of the pair of column signal line, and the drain of the first amplification transistor is coupled to the reference side load of the current mirror circuit via the other of the pair of column signal line, and wherein the gate of the second amplification transistor is coupled to the drain thereof, and the drain of the second amplification transistor is coupled to the output side load of the current mirror circuit.
It is further preferable that the source and/or the drain of the first amplification transistor are coupled to the pair of column signal lines via first and/or second switching transistors respectively, and the gates of the first and/or second switching transistors are coupled to the row selecting line.
It is advantageous that the source and/or the drain of the second amplification transistor are coupled to one of the pair of column signal lines via a third switching transistor and/or to the output side load of the current mirror circuit via a fourth switching transistor.
In the solid state imaging device of the present invention, the first amplification transistors of the pixels and the second amplification transistors disposed in respective columns are coupled in a voltage follower structure in response to a row selecting signal. Therefore, the gain of amplification of an output signal of each active cell becomes larger than that of a conventional solid state imaging device. Thus, according to the present invention, it is possible to provide a solid state imaging device which is robust against noises, which is suitable for use with a low power supply voltage, and which has low cost as a whole.
Also, by the above-mentioned structure, it is possible to easily obtain the voltage follower structure. By coupling the above-mentioned first or second switching transistors to the source or the drain of the first amplification transistor respectively, a selection of an active pixel is performed by the row selecting line, and by coupling the first and second switching transistors to both, signal separation in a column direction becomes easy. Further, by using the abovementioned third and/or fourth switching transistors, symmetry of a differential amplifier constituting a voltage follower is improved.